delay circuit meaning in Chinese
延迟电路
延迟线路
延时电路
Examples
- Time - delay circuit
时间延滞电路 - The pulse width trigger circuit , trigger delay circuit are discussed . and a new kind of peak detection module which is implemented by verilog hdl in fpga and greatly enhances the performance of catching glitch is discussed in the dissertation . the waveform recorder function accomplished in the scopemeter can test , monitor slow analog signals and record the characteristic value of signals continuously for a long time
本文讨论了脉宽触发电路和触发释抑电路的实现,采用veriloghdl在fpga中实现了一种峰值检测模块,提高了示波表的毛刺捕捉能力,设计的波形记录( recorder )功能模块能够对输入的模拟信号进行长时间连续不断的采样量化,并记录波形数据和及时送显示。 - The use of time delays on these vehicles helps to eliminate transmission and motor damage by providing even and controlled acceleration . the delay is adjustable between 0 to 5 seconds and can be wired independently of other delays or alternatively these delays can be wired in cascade so that it is necessary for the first delay to switch on before the following commences timing etc . suppression is included in the delay circuit to prevent damage by voltage transients
延迟开关可以调整延迟时间0 ~ 5秒，并可连接数个延迟开关来逐步控制连续动作之时间(复数连接时，第一个开关要启动接下来的开关才会跟著动作)避免电动车起动初期之电力脉冲，达到平顺的起步动作，可预防电压无端变动造成之电路故障